OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING

DESCRIPTION The M54/74HCT564 and M54HCT574 are high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 62 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OU

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING

DESCRIPTION The M54/74HCT564 and M54HCT574 are high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 62 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OU

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING

DESCRIPTION The M54/74HCT564 and M54HCT574 are high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 62 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OU

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT564 INVERTING - HCT574 NON INVERTING

DESCRIPTION The M54/74HCT564 and M54HCT574 are high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 62 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ COMPATIBLE WITH TTL OU

Octal D-type flip-flop; positive-edge trigger; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT564 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state inverting outputs for bus oriented applications • 8-bit positive-edge tr

Octal D-type flip-flop; positive-edge trigger; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT564 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state inverting outputs for bus oriented applications • 8-bit positive-edge tr

Octal D-type flip-flop; positive-edge trigger; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT564 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state inverting outputs for bus oriented applications • 8-bit positive-edge tr

High Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggered

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High-Speed CMOS Logic Octal D-Type Flip-Flop, Three-State Inverting Positive-Edge Triggered

文件：431.78 Kbytes Page：16 Pages