QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes Page：9 Pages

QUAD BUS BUFFER (3-STATE)

QUAD BUS BUFFERS 3-STATE

DESCRIPTION The M54/74HCT125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. ■ HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS ■ BALANCED P

QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V

QUAD BUS BUFFERS 3-STATE

DESCRIPTION The M54/74HCT125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. ■ HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS ■ BALANCED P

QUAD BUS BUFFERS 3-STATE

DESCRIPTION The M54/74HCT125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology. ■ HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C ■ OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS ■ BALANCED P

QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V

QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V

QUAD BUS BUFFER (3-STATE)

DESCRIPTION The M74HCT125 is an high speed CMOS QUAD BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V

QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes Page：9 Pages

QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes Page：9 Pages

QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes Page：9 Pages

QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes Page：9 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER NON-INVERT 5.5V 14SO 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUF NON-INVERT 5.5V 14TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

QUAD BUS BUFFER (3-STATE)

文件：172.55 Kbytes Page：9 Pages

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICC category: MSI

Quad buffer/line driver; 3-state

1. General description The 74HC125; 74HCT125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to

Quad buffer/line driver; 3-state

GENERAL DESCRIPTION The 74HC/HCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICC category: MSI

Quad buffer/line driver; 3-state

QUADRUPLE 3-STATE BUFFERS OE LOW

文件：284.89 Kbytes Page：8 Pages