8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M54/74HC597 is a high speed CMOS 8-BIT LATCH/SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED fMAX = 60 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATIO

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M74HC597 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 50 MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■

8 BIT LATCH/SHIFT REGISTER

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M54/74HC597 is a high speed CMOS 8-BIT LATCH/SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED fMAX = 60 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATIO

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M74HC597 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 50 MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M54/74HC597 is a high speed CMOS 8-BIT LATCH/SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED fMAX = 60 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATIO

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M54/74HC597 is a high speed CMOS 8-BIT LATCH/SHIFT REGISTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED fMAX = 60 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATIO

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M74HC597 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 50 MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M74HC597 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 50 MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■

8 BIT LATCH/SHIFT REGISTER

DESCRIPTION The M74HC597 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 50 MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■

封装/外壳：16-DIP（0.300"，7.62mm） 功能：并行至串行 包装：卷带（TR） 描述：IC LATCH/SHIFT REG 8BIT 16-DIP 集成电路（IC） 移位寄存器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：并行至串行 包装：管件 描述：IC LATCH/SHFT REGIST 8BIT 16SOIC 集成电路（IC） 移位寄存器

8-bit shift register with input flip-flops

1. General description The 74HC597; 74HCT597 is an 8-bit shift register with input flip-flops. It consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and the shift register have positive edge-triggered clocks. The shift registe

8-bit shift register with input flip-flops

GENERAL DESCRIPTION The 74HC/HCT597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-bit parallel storage register inputs • Shift register has direct overriding lo

8-bit shift register with input flip-flops

GENERAL DESCRIPTION The 74HC/HCT597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-bit parallel storage register inputs • Shift register has direct overriding lo

8-bit shift register with input flip-flops

1. General description The 74HC597; 74HCT597 is an 8-bit shift register with input flip-flops. It consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and the shift register have positive edge-triggered clocks. The shift registe

8-bit shift register with input flip-flops

GENERAL DESCRIPTION The 74HC/HCT597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-bit parallel storage register inputs • Shift register has direct overriding lo