8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

8位SIPO移位寄存器锁存器（3态）

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：串行至并行 包装：管件 描述：IC REGISTER 8BIT SIPO 16-SOIC 集成电路（IC） 移位寄存器

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 功能：串行至并行 包装：管件 描述：IC SHIFT LATCH REG SIPO 16-TSSOP 集成电路（IC） 移位寄存器

8-Bit Serial-Input Shift Register With Latched 3-State Outputs(High-Performance Silicon-Gate CMOS)

8-Bit Serial-Input Shift Register With Latched 3-State Outputs High-Performance Silicon-Gate CMOS The SL74HC4094 is identical in pinout to the LS/ALS4094. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8-stage shift-and-store bus register

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High Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

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8-BIT SHIFT AND STORE REGISTER (3-STAFE)

文件：303.6 Kbytes Page：8 Pages