3 TO 8 LINE DECODER/LATCH

DESCRIPTION The M54/74HC131 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

3 TO 8 LINE DECODER/LATCH

DESCRIPTION The M54/74HC131 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

3 TO 8 LINE DECODER/LATCH

DESCRIPTION The M54/74HC131 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

3 TO 8 LINE DECODER/LATCH

DESCRIPTION The M54/74HC131 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

3 TO 8 LINE DECODER/LATCH

DESCRIPTION The M54/74HC131 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA

3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers

Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse. Output control (G 1, G2) are independent of select input and CLK input, and when G1

3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers

Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A, B, C) and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse. Output control (G1, G2) are independent of select input and CLK input, and when G1

3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers

Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A, B, C) and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse. Output control (G1, G2) are independent of select input and CLK input, and when G1

3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers

Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A, B, C) and D type register. Address select data store to D type registers, during the positive going transition of the clock pulse. Output control (G1, G2) are independent of select input and CLK input, and when G1