型号 功能描述 生产厂家 企业 LOGO 操作
M68AF127B

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

M68AF127B

1Mbit 128K x8, 5V Asynchronous SRAM

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

M68AF127B产品属性

  • 类型

    描述

  • 型号

    M68AF127B

  • 制造商

    STMICROELECTRONICS

  • 制造商全称

    STMicroelectronics

  • 功能描述

    1Mbit 128K x8, 5V Asynchronous SRAM

更新时间:2026-3-1 19:18:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
STM
24+
DIP32
35200
一级代理/放心采购
ST/意法
22+
DIP-32
3000
原装正品,支持实单
ST
25+
SOP-32
3200
全新原装、诚信经营、公司现货销售!
M68AF127BM55MC6U
25+
123
123
STM
22+
SOP8
5000
全新原装现货!价格优惠!可长期
ST/
24+
TSSOP32
5000
全新原装正品,现货销售
ST
23+
TSSOP
5000
原装正品,假一罚十
ST
24+
SOP
2000
STM
18+
SOP32
85600
保证进口原装可开17%增值税发票
ST/意法
25+
SOP32
32360
ST/意法全新特价M68AF127BM55MC6即刻询购立享优惠#长期有货

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