型号 功能描述 生产厂家 企业 LOGO 操作
M68AF127B

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

M68AF127B

1Mbit 128K x8, 5V Asynchronous SRAM

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

1Mbit 128K x8, 5V Asynchronous SRAM

SUMMARY DESCRIPTION The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 4.5 to 5.5V supply. This device

STMICROELECTRONICS

意法半导体

M68AF127B产品属性

  • 类型

    描述

  • 型号

    M68AF127B

  • 制造商

    STMICROELECTRONICS

  • 制造商全称

    STMicroelectronics

  • 功能描述

    1Mbit 128K x8, 5V Asynchronous SRAM

更新时间:2025-11-21 20:31:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ST/意法
25+
SOP32
32360
ST/意法全新特价M68AF127BM55MC6即刻询购立享优惠#长期有货
ST/意法
24+
NA/
4292
优势代理渠道,原装正品,可全系列订货开增值税票
MICROCHIP/微芯
25+
NA
996880
只做原装,欢迎来电资询
ST/意法
24+
SOP32
880000
明嘉莱只做原装正品现货
ST
0723+
TSSOP
44
一级代理,专注军工、汽车、医疗、工业、新能源、电力
ST
24+
SSOP
90000
一级代理商进口原装现货、假一罚十价格合理
ST
23+
NA
121
专做原装正品,假一罚百!
ST
20+
DIP
2860
原厂原装正品价格优惠公司现货欢迎查询
ST
23+
SOP32
2800
绝对全新原装!现货!特价!请放心订购!
ST
23+
STSOP-32
16900
正规渠道,只有原装!

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