ASSP (USB2.0 Peripheral Controller)

1.2 Features ♦ Universal Serial Bus Specification Revision 2.0 compliant ♦ Built-in USB transceiver ♦ Supports both Hi-Speed (480M bps) and Full-Speed (12M bps) ♦ USB protocol layer by hardware • Bit stuffing encoding and decoding • CRC (Cyclic Redundancy Check) generation and checking • NR

ASSP (USB2.0 Peripheral Controller)

1.2 Features ♦ Universal Serial Bus Specification Revision 2.0 compliant ♦ Built-in USB transceiver ♦ Supports both Hi-Speed (480M bps) and Full-Speed (12M bps) ♦ USB protocol layer by hardware • Bit stuffing encoding and decoding • CRC (Cyclic Redundancy Check) generation and checking • NR

ASSP (USB2.0 Peripheral Controller)

文件：950.14 Kbytes Page：133 Pages

ASSP (USB2.0 Peripheral Controller)

包装：托盘 描述：MCU LQFP 集成电路（IC） 微控制器

ASSP (USB2.0 Peripheral Controller)

文件：1.00606 Mbytes Page：135 Pages

Open-Style Power Distribution Blocks

FEATURES/BENEFITS : • Adder Poles: All sizes have optional adder poles for increased flexibility and ease-of-use. Adder poles can be stacked to form multi-pole units in the field without the use of tools. Adder poles allow for customization of primary and secondary wire combinations. End barr

CMOS 16-bit microcontroller

Overview The MSM66591/ML66592 are high performance 16-bit microcontrollers that contain a 16-bit CPU (nX-8/500S), ROM, RAM, a 10-bit A/D converter, serial ports, flexible timers, and PWMs. The ML66592 is the same as the MSM66591 with the exception that the ML66592 has an increased ROM and RAM ca