4 BIT D TYPE LATCH

DESCRIPTION The M54/74HC75 is a high speed CMOS 4-BIT D-TYPE LATCH fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■ OUTPUT

4 BIT D TYPE LATCH

DESCRIPTION The M54/74HC75 is a high speed CMOS 4-BIT D-TYPE LATCH fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■ OUTPUT

RAD HARD 4 BIT D TYPE LATCH

文件：250.03 Kbytes Page：10 Pages

Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

4 BIT D TYPE LATCH

DESCRIPTION The M54/74HC75 is a high speed CMOS 4-BIT D-TYPE LATCH fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■ OUTPUT

4 BIT D TYPE LATCH

DESCRIPTION The M54/74HC75 is a high speed CMOS 4-BIT D-TYPE LATCH fabricated in silicon gate C2MOS technology. ■ HIGH SPEED tPD = 10 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.) ■ OUTPUT

RAD HARD 4 BIT D TYPE LATCH

文件：250.03 Kbytes Page：10 Pages

Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

RAD HARD 4 BIT D TYPE LATCH

文件：250.03 Kbytes Page：10 Pages

RAD HARD 4 BIT D TYPE LATCH

文件：250.03 Kbytes Page：10 Pages

Rad-hard high speed 2 to 6 V CMOS logic series

文件：306.74 Kbytes Page：29 Pages

RAD HARD 4 BIT D TYPE LATCH

文件：250.03 Kbytes Page：10 Pages

Dual 2-Bit Bistable Transparent Latch

Features • True and Complementary Outputs • Buffered Inputs and Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • B

Dual 2-Bit Bistable Transparent Latch

文件：348.92 Kbytes Page：15 Pages

Dual 2-Bit Bistable Transparent Latch

文件：430.25 Kbytes Page：19 Pages

Dual 2-Bit Bistable Transparent Latch

文件：508.01 Kbytes Page：17 Pages