5.0 and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

Features • 5.0, 3.3, or 3.0 V operation • 400 kHz I2C bus • NVRAM supervisor to non-volatize external LPSRAM • 2.5 to 5.5 V oscillator operating voltage • Automatic switchover and deselect circuitry • Choice of power-fail deselect voltages − M41ST87Y: (not recommended for new design, contac

5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

文件：695.58 Kbytes Page：52 Pages

5.0, 3.3, or 3.0V, 1280 bit (160 x8) Secure Serial RTC and NVRAM Supervisor with Tamper Detection

Description The M41ST87Y/W secure serial RTC and NVRAM supervisor is a low power 1280-bit, static CMOS SRAM organized as 160 bytes by 8 bits. A built-in 32.768 kHz oscillator (internal crystal-controlled) and 8 bytes of the SRAM (see Table 7 ) are used for the clock/calendar function and are conf

5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

文件：461.42 Kbytes Page：48 Pages

5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM

文件：695.58 Kbytes Page：52 Pages