Dual Differential Comparators

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LF198JAN Monolithic Sample-and-Hold Circuits

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Octal Bus Transceivers

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DUAL DIFFERENTIAL RECEIVERS

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Quad Differential Comparators

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Hex Schmitt-Trigger Inverters

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DUAL SPST ANALOG SWITCH with CMOS and TTL versatility made from original Intersil wafers

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LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIERS

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SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

description These devices contain four independent 2-input NAND buffer gates with open-collector outputs. The open- collector outputs require pull-up resistors to perform correctly. They may be connected to other open- collector outputs to implement active-low wired-OR or active-high wired-A

CMOS NAND Gates

Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range)

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

DUAL DIFFERENTIAL RECEIVERS

Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs
Single 5-V Supply
Differential Line Operation
Dual-Channel Operation
TTL Compatible
±15-V Common-Mode Input Voltage Range
Optional-Use Built-In 130-W Line- Terminating Resistor
Individual Frequency-Response Con

LMx24, LMx24x, LMx24xx, LM2902, LM2902x, LM2902xx, LM2902xxx Quadruple Operational Amplifiers

1 Features • Wide supply range: – 3 V to 36 V (B, BA versions) – 3 V to 30 V (LMx24, LM2902V) • Low input offset voltage maximum at 25°C: – 2 mV (BA versions LM2902A, LM124A) – 3 mV (B versions LMx24xA) • Low input bias current maximum at 25°C: – 35 nA (B, BA versions) • 2-kV ESD protecti

LMx24, LMx24x, LMx24xx, LM2902, LM2902x, LM2902xx, LM2902xxx Quadruple Operational Amplifiers

1 Features • Wide supply range: 3 V to 36 V (B, BA versions) • Low input offset voltage maximum at 25°C: ±2 mV (BA versions, LM2902A, LM124A) • 2-kV ESD protection (HBM) (B, BA, K versions) • Internal RF and EMI filter (B, BA versions) • Common-mode input voltage range includes V– • Input v

LMx24, LMx24x, LMx24xx, LM2902, LM2902x, LM2902xx, LM2902xxx Quadruple Operational Amplifiers

1 Features • New LM324B and LM2902B • B versions are drop-in replacements for all versions of LM224, LM324, and LM2902 • Improved specifications of B version – Supply range: 3 V to 36 V (B, BA versions) – Low input offset voltage: ±2 mV (BA version) / 3 mV (B version) – ESD rating: 2 kV (H

Quadruple Operational Amplifiers

1 Features • New LM324B and LM2902B • B versions are drop-in replacements for all versions of LM224, LM324, and LM2902 • Improved specifications of B version – Supply range: 3 V to 36 V (B, BA versions) – Low input offset voltage: ±2 mV (BA version) / 3 mV (B version) – ESD rating: 2 kV (H

LMx24, LMx24x, LMx24xx, LM2902, LM2902x, LM2902xx, LM2902xxx Quadruple Operational Amplifiers

1 Features • Next-generation LM324B and LM2902B • B versions are drop-in replacements for all versions of LM224, LM324, and LM2902 • Improved specifications of B version – Supply range: 3V to 36V (B, BA versions) – Low input offset voltage: ±2mV (BA version) / 3mV (B version) – ESD rating:

LMx24, LMx24x, LMx24xx, LM2902, LM2902x, LM2902xx, LM2902xxx Quadruple Operational Amplifiers

1 Features • New LM324B and LM2902B • B versions are drop-in replacements for all versions of LM224, LM324, and LM2902 • Improved specifications of B version – Supply range: 3 V to 36 V (B, BA versions) – Low input offset voltage: ±2 mV (BA version) / 3 mV (B version) – ESD rating: 2 kV (H

LMx24, LMx24x, LMx24xx, LM2902, LM2902x, LM2902xx, LM2902xxx Quadruple Operational Amplifiers

1 Features • Next-generation LM324B and LM2902B • B versions are drop-in replacements for all versions of LM224, LM324, and LM2902 • Improved specifications of B version – Supply range: 3V to 36V (B, BA versions) – Low input offset voltage: ±2mV (BA version) / 3mV (B version) – ESD rating:

LM193JAN Low Power Low Offset Voltage Dual Comparators

1FEATURES 2• Wide Supply – Voltage Range: 5.0VDC to 36VDC – Single or Dual Supplies: ±2.5VDC to ±18VDC • Very Low Supply Current Drain (0.4 mA) — Independent of Supply Voltage • Low Input Biasing Current: 25 nA typ • Low Input Offset Current: ±3 nA typ • Maximum Offset Voltage +5mV Max @ 2

TL07xx Low-Noise FET-Input Operational Amplifiers

1 Features • High slew rate: 20 V/μs (TL07xH, typ) • Low offset voltage: 1 mV (TL07xH, typ) • Low offset voltage drift: 2 μV/°C • Low power consumption: 940 μA/ch (TL07xH, typ) • Wide common-mode and differential voltage ranges – Common-mode input voltage range includes VCC+ • Low input b

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates

1 Features 1• Package Options Include: – Plastic Small-Outline (D, NS, PS) – Shrink Small-Outline (DB) – Ceramic Flat (W) – Ceramic Chip Carriers (FK) – Standard Plastic (N) – Ceramic (J) • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package • Inputs Are TTL C

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

description These devices contain four independent 2-input NAND buffer gates with open-collector outputs. The open- collector outputs require pull-up resistors to perform correctly. They may be connected to other open- collector outputs to implement active-low wired-OR or active-high wired-A

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS

description These devices contain four independent 2-input NAND buffer gates with open-collector outputs. The open- collector outputs require pull-up resistors to perform correctly. They may be connected to other open- collector outputs to implement active-low wired-OR or active-high wired-A

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

SNx4LS24x, SNx4S24x Octal Buffers and Line Drivers With 3-State Outputs

1 Features 1• Inputs Tolerant Down to 2 V, Compatible With 3.3-V or 2.5-V Logic Inputs • Maximum tpd of 15 ns at 5 V • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • PNP Inputs Reduce DC Loading • Hysteresis at Inputs Improves Noise Margins 2 Applications • Servers

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and