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ISPLSI2064V-100LJ84中文资料
ISPLSI2064V-100LJ84数据手册规格书PDF详情
Description
The ispLSI 2064V is a High Density Programmable Logic Device available in 64 and 32 I/O-pin versions. The device contains 64 Registers, four Dedicated Input pins, three Dedicated Clock Input pins, two dedicated Global OE input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 2064V features in-system programmability through the Boundary Scan Test Access Port (TAP). The ispLSI 2064V offers non-volatile reprogrammability of the logic, as well as the interconnect, to provide truly reconfigurable systems.
Features
• HIGH DENSITY PROGRAMMABLE LOGIC
— 2000 PLD Gates
— 64 and 32 I/O Pin Versions, Four Dedicated Inputs
— 64 Registers
— High Speed Global Interconnect
— Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
• 3.3V LOW VOLTAGE 2064 ARCHITECTURE
— Interfaces with Standard 5V TTL Devices
— The 64 I/O Pin Version is Fuse Map Compatible with 5V ispLSI 2064
• HIGH-PERFORMANCE E2CMOS® TECHNOLOGY
— fmax = 100MHz Maximum Operating Frequency
— tpd = 7.5ns Propagation Delay
— Electrically Erasable and Reprogrammable
— Non-Volatile
— 100 Tested at Time of Manufacture
— Unused Product Term Shutdown Saves Power
• IN-SYSTEM PROGRAMMABLE
— 3.3V In-System Programmability (ISP™) Using Boundary Scan Test Access Port (TAP)
— Open-Drain Output Option for Flexible Bus Interface Capability, Allowing Easy Implementation of Wired-OR or Bus Arbitration Logic
— Increased Manufacturing Yields, Reduced Time-toMarket and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
• THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAs
— Enhanced Pin Locking Capability
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global Interconnectivity
• ispDesignEXPERT™ – LOGIC COMPILER AND COMPLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
— Superior Quality of Results
— Tightly Integrated with Leading CAE Vendor Tools
— Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™
— PC and UNIX Platforms
ISPLSI2064V-100LJ84产品属性
- 类型
描述
- 型号
ISPLSI2064V-100LJ84
- 制造商
LATTICE
- 制造商全称
Lattice Semiconductor
- 功能描述
3.3V High Density Programmable Logic
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
LATTICE |
00+ |
PLCC-84P |
7 |
现货 |
|||
LATTICE |
22+ |
PLCC-84 |
4650 |
||||
LATTICE |
23+ |
NA |
25060 |
只做进口原装,终端工厂免费送样 |
|||
Lattice |
23+ |
TQFP |
1005 |
全新原装现货 |
|||
LATTICE |
2021+ |
N/A |
6800 |
只有原装正品 |
|||
Lattice |
2138+ |
TQFP |
8960 |
专营BGA,QFP原装现货,假一赔十 |
|||
Lattice |
23+ |
TQFP-100 |
7000 |
绝对全新原装!100%保质量特价!请放心订购! |
|||
LATTICE |
新 |
494 |
全新原装 货期两周 |
||||
Lattice |
22+23+ |
18176 |
绝对原装正品全新进口深圳现货 |
||||
LATTICE |
NA |
5650 |
一级代理 原装正品假一罚十价格优势长期供货 |
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Lattice Semiconductor Corporation 莱迪思半导体
Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships, and comm