丝印代码：LV810RILF；BUFFER/CLOCK DRIVER

Features • Packaged in 20-pin QSOP/SSOP • Split 1:10 fanout Buffer • Maximum skew between outputs of different packages 0.75 ns • Max propagation delay of 3.8 ns • Operating voltage of 1.5 V to 2.5 V on Bank A • Operating voltage of 1.5 V to 2.5 V on Banks B and C • Advanced, low power, CM

封装/外壳：20-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:10 133MHZ 20SSOP 集成电路（IC） 时钟缓冲器，驱动器

BUFFER/CLOCK DRIVER

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丝印代码：LV810RILF；BUFFER/CLOCK DRIVER

Features • Packaged in 20-pin QSOP/SSOP • Split 1:10 fanout Buffer • Maximum skew between outputs of different packages 0.75 ns • Max propagation delay of 3.8 ns • Operating voltage of 1.5 V to 2.5 V on Bank A • Operating voltage of 1.5 V to 2.5 V on Banks B and C • Advanced, low power, CM

封装/外壳：20-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:10 133MHZ 20SSOP 集成电路（IC） 时钟缓冲器，驱动器

3-Pin Microprocessor Reset Monitors

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3-Pin Microprocessor Reset Monitors

The MAX809 and MAX810 are cost–effective system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. Features • Precision VCC Monitor for 2.5 V, 3.0 V, 3.3 V, and 5.0 V Supplies • Pre

3-Pin Microprocessor Reset Monitors

The MAX809 and MAX810 are cost–effective system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. Features • Precision VCC Monitor for 2.5 V, 3.0 V, 3.3 V, and 5.0 V Supplies • Pre

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