位置：首页 > IC中文资料第6299页 > LV16
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
丝印代码：LV161284；19-BIT BUS INTERFACE 4.5-V to 5.5-V VCC Operation 1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications Flow-Through Architecture Optimizes PCB Layout Latc | TI 德州仪器 |   | ||
丝印代码：LV161284；19-BIT BUS INTERFACE 4.5-V to 5.5-V VCC Operation 1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications Flow-Through Architecture Optimizes PCB Layout Latc | TI 德州仪器 | | ||
丝印代码：LV161284；19-BIT BUS INTERFACE 4.5-V to 5.5-V VCC Operation 1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications Flow-Through Architecture Optimizes PCB Layout Latc | TI 德州仪器 | | ||
丝印代码：LV161284；19-BIT BUS INTERFACE 4.5-V to 5.5-V VCC Operation 1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications Flow-Through Architecture Optimizes PCB Layout Latc | TI 德州仪器 | | ||
丝印代码：LV161284；19-BIT BUS INTERFACE 4.5-V to 5.5-V VCC Operation 1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications Flow-Through Architecture Optimizes PCB Layout Latc | TI 德州仪器 | | ||
丝印代码：LV161284；19-BIT BUS INTERFACE 4.5-V to 5.5-V VCC Operation 1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors Designed for IEEE Std 1284-I (Level-1 Type) and IEEE Std 1284-II (Level-2 Type) Electrical Specifications Flow-Through Architecture Optimizes PCB Layout Latc | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV161A；4-BIT SYNCHRONOUS BINARY COUNTERS 2-V to 5.5-V VCC Operation Max tpd of 9.5 ns at 5 V Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Internal Look-Ahead for Fast Counting Carry Outp | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-driv | TI 德州仪器 | | ||
丝印代码：LV164A；SN74LV164A 8-Bit Parallel-Out Serial Shift Registers 1 Features • VCC operation of 2 V to 5.5 V • Maximum tpd of 10.5 ns at 5 V • Typical VOLP (output ground bounce) 2.3 V at VCC = 3.3 V, TA = 25°C • Ioff supports live insertion, partial power-down mode, and back-drive | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | | ||
丝印代码：LV165A；SN74LV165A Parallel-Load 8-Bit Shift Registers 1 Features • 2 V to 5.5 V VCC operation • Maximum tpd of 10.5 ns at 5 V • Support mixed-mode voltage operation on all ports • Ioff supports partial-power-down mode operation • Latch-up performance exceeds 250 mA per JESD 17 2 Applications • Increase the Number of Inputs on a Microcontr | TI 德州仪器 | |
LV16产品属性
- 类型
描述
- 型号
LV16
- 制造商
KNOX
- 制造商全称
KNOX
- 功能描述
HF HYPERABRUPT TUNING DIODES
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
2025+ |
N/A |
70000 |
柒号只做原装 现货价秒杀全网 |
|||
TI |
2511 |
SOP |
12800 |
电子元器件采购降本30%!原厂直采,砍掉中间差价 |
|||
TI(德州仪器) |
24+ |
N/A |
6000 |
原厂原装，价格优势，欢迎洽谈！ |
|||
TI(德州仪器) |
25+ |
SOIC-16 |
500000 |
源自原厂成本,高价回收工厂呆滞 |
|||
TI |
25+ |
SOP |
30000 |
原装正品公司现货,假一赔十! |
|||
TI |
21+ |
SOP |
10000 |
只做原装,质量保证 |
|||
TI/德州仪器 |
24+ |
DIP |
1500 |
只供应原装正品 欢迎询价 |
|||
TI |
25+ |
SOIC-16 |
7500 |
只做原装 有挂有货 假一赔十 |
|||
TI |
24+ |
SOP |
6000 |
全新原装深圳仓库现货有单必成 |
|||
TI(德州仪器) |
25+ |
N/A |
6000 |
原装，请咨询 |
LV16规格书下载地址
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- LV138A
- LV13605TJ-ADJ/NOPB
- LV13603BMRX-ADJ/NOPB
- LV13603AMRX-ADJ/NOPB
- LV12S5-100
- LV12S28-150
- LV12S26-150-S
- LV126A
- LV125A
- LV123A
- LV1150M
- LV1150
- LV1117N
- LV1117
- LV1116N
- LV1115M
- LV1115
- LV1100
- LV1050M
- LV1041M
LV16数据表相关新闻
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2020-8-11LV1017
深圳市科恒伟业电子有限公司 深圳市福田区华强北振兴路101号华匀大厦2栋5楼516 网站 http://www.kehengweiyedz.cn 网站http://www.kehengweiye.com 邮箱：yulin522@126.com 0755-83200050 15817287769 13424246946柯先生
2020-4-1LV2842XLVDDCR原装现货
LV2842XLVDDCR原装现货
2019-11-25
DdatasheetPDF页码索引
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