具有双环路且符合 JESD204B 标准的超低噪声时钟抖动消除器

LMK04832 是一款具有超高性能的时钟调节器，不但支持 JEDEC JESD204B，而且与 LMK0482x 器件系列引脚兼容。\n\nPLL2 可以配置 14 个时钟输出以驱动 7 个 JESD204B 转换器或其他逻辑器件（使用器件和 SYSREF 时钟）。SYSREF 可以通过直流和交流耦合提供。不只是 JESD204B 应用，14 个输出中的每一个输出都可以单独配置为用于传统时钟系统的高性能输出。\n\nLMK04832 可以配置在双 PLL、单 PLL 或时钟分配模式下工作（使用或不使用 SYSREF 生成或时钟恢复）。PLL2 可以使用内部或外部 VCO 工作。\n\nLMK • 最高时钟输出频率：3255MHz\n• 超低噪声，2500MHz 时： \n• 64fs RMS 抖动（100Hz 至 20MHz）\n• 超低噪声，3200MHz 时： \n• 67fs RMS 抖动（100Hz 至 100MHz）\n• PLL2 \n• –128dBc/Hz PLL 1/f\n• 两个集成 VCO：2440 至 2580MHz 和 2945 至 3255MHz\n• 多达 14 个差动器件时钟 \n• 最多 1 个缓冲 VCXO/XO 输出 \n• 1-1023 CLKout 分频器 \n• SYSREF 时钟 25ps 阶跃模拟延迟\n• PLL1 保持模式\n• ;

LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs

文件：386.85 Kbytes Page：8 Pages

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.82028 Mbytes Page：98 Pages

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.35648 Mbytes Page：99 Pages

丝印代码：LMK04832MPAPSEP；LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

丝印代码：LMK04832MPAPSEP；LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

丝印代码：LMK04832W/EM；LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.82028 Mbytes Page：98 Pages

丝印代码：LMK04832W/EM；LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.82028 Mbytes Page：98 Pages

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

耐辐射且符合 JESD204B/C 标准的 30krad 超低噪声 3.2GHz、15 路输出时钟抖动清除器

The LMK04832-SEP is a high performance clock conditioner with JEDEC JESD204B/C support for space applications.\n\nThe 14 clock outputs from PLL2 can be configured to drive seven JESD204B/C converters or other logic devices using device and SYSREF clocks. SYSREF can be provided using both DC and AC c • VID#: V62/22612 \n• SEL immune >43 MeV × cm2/mg\n• Ambient temperature range: –55°C to 125°C\n• Multi-mode: dual PLL, single PLL, and clock distribution\n• Ultra-low noise, at 2500 MHz: \n• 64-fs RMS jitter (100 Hz to 20 MHz)\n• Ultra-low noise, at 3200 MHz: \n• 67-fs RMS jitter (100 Hz to 100 MHz;

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner

1 Features • VID#: V62/22612 – Total ionizing dose 30 krad (ELDRS-free) – SEL immune >43 MeV × cm2/mg – SEFI immune >43 MeV × cm2/mg • Ambient temperature range: –55°C to 125°C • Maximum clock output frequency: 3255 MHz • Multi-mode: dual PLL, single PLL, and clock distribution • 6-GHz ex

Space grade ultra low-Noise JESD204B compliant clock jitter cleaner

The LMK04832-SP is a high performance clock conditioner with JEDEC JESD204B support for space applications.\n\nThe 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupli • SMD #5962R1723701VXC \n• SEL immune >120 MeV × cm2/mg\n• Maximum clock output frequency: 3255 MHz\n• 6-GHz external VCO or distribution input\n• 54-fs RMS jitter (12 kHz to 20 MHz)\n• –157.6-dBc/Hz noise floor\n• Ultra-low noise, at 3200 MHz: \n• 67-fs RMS jitter (100 Hz to 100 MHz)\n• PLL2 \n• PL;

封装/外壳：64-WFQFN 裸露焊盘 包装：卷带（TR） 描述：IC JITTER CLEANER 64WQFN 集成电路（IC） 时钟发生器，PLL，频率合成器

LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs

文件：386.85 Kbytes Page：8 Pages

LMK04832 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs

文件：386.85 Kbytes Page：8 Pages

封装/外壳：64-WFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC JITTER CLEANER 64WQFN 集成电路（IC） 时钟发生器，PLL，频率合成器

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.35648 Mbytes Page：99 Pages

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.82028 Mbytes Page：98 Pages

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.82028 Mbytes Page：98 Pages

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.35648 Mbytes Page：99 Pages

LMK04832-SP Space Grade Ultra-Low-Noise JESD204B Dual-Loop Clock Jitter Cleaner

文件：2.35648 Mbytes Page：99 Pages