EPITAXIAL PLANAR NPN TRANSISTOR (HIGH CURRENT)

HIGH CURRENT APPLICATION. FEATURES • Complementary to KTA1271.

TO-92 Plastic-Encapsulate Transistors (NPN)

TRANSISTOR (NPN) FEATURES ● Complementary to KTA1271

Silicon NPN transistor in a TO-92 Plastic Package

Descriptions Silicon NPN transistor in a TO-92 Plastic Package. Features Complementary to KTA1271. Applications High current application.

NPN Plastic-Encapsulated Transistor

FEATURES • Complementary to KTA1271

TO-92 Plastic-Encapsulate Transistors

TRANSISTOR (NPN) FEATURES ● Complementary to KTA1271

TRANSISTOR (NPN)

FEATURE Power dissipation PCM: 0.625 W (Tamb=25℃) Collector current ICM: 0.8 A Collector-base voltage V(BR)CBO: 35 V Operating and storage junction temperature range Tstg: -55℃ to +150℃ TJ: 150℃

General Purpose Transistor, TO-92, 30V, 0.8A

• Complementary to KTA1271;

双极型晶体管

NPN Transistors

SEMICONDUCTOR TECHNICAL DATA

HIGH CURRENT APPLICATION. FEATURES • Complementary to KTA1271A

NPN Plastic-Encapsulated Transistor

FEATURES • Complementary to KTA1271

NPN Plastic-Encapsulated Transistor

FEATURES • Complementary to KTA1271

NPN Plastic-Encapsulated Transistor

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EPITAXIAL PLANAR NPN TRANSISTOR

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2-Phase IMVP-II & IMVP-III Core Controller for Mobile CPUs

GENERAL DESCRIPTION The ADP3203 is a 1- or 2-phase hysteretic peak current dc-to-dc buck converter controller dedicated to power a mobile processor’s core. The optimized low voltage design is powered from the 3.3 V system supply and draws only 10 µA maximum in shutdown. The nominal output volta

Bi-directional Glass passivated junction

Sample Instructions for Choosing a Packing Option (1) If selecting an “L401E6” (sensitive gate, 400 V, 1 A triac in a TO-92 package), choose one of the options available for that device: • Bulk packed in 2,000 quantity • Tape and Reel with 2,000 parts per reel • Tape and Ammo with 2,

SINGLE TMOS POWER MOSFET 4.9 AMPERES 20 VOLTS RDS(on) = 0.05 OHM

Medium Power Surface Mount Products TMOS Single P-Channel Field Effect Transistor Micro8 devices are an advanced series of power MOSFETs which utilize Motorola’s High Cell Density HDTMOS process to achieve lowest possible on–resistance per silicon area. They are capable of withstanding high ener

P-Channel Enhancement-Mode Vertical DMOS FETs

These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperatur