型号 功能描述 生产厂家&企业 LOGO 操作
K4H560438

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

DDRSDRAMProductGuide

ConsumerMemory

SamsungSamsung Group

三星三星半导体

Samsung

ConsumerMemory

SDRAMProductGuide MemoryDivision November2007

SamsungSamsung Group

三星三星半导体

Samsung

DDRSDRAMProductGuide

ConsumerMemory

SamsungSamsung Group

三星三星半导体

Samsung

256MbJ-dieDDRSDRAMSpecification

ConsumerMemory

SamsungSamsung Group

三星三星半导体

Samsung

256MbJ-dieDDRSDRAMSpecification

ConsumerMemory

SamsungSamsung Group

三星三星半导体

Samsung

256MbJ-dieDDRSDRAMSpecification

ConsumerMemory

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

128MbDDRSDRAM

Features •Double-data-ratearchitecture;twodatatransfersperclockcycle •Bidirectionaldatastrobe(DQS) •Fourbanksoperation •Differentialclockinputs(CKandCK) •DLLalignsDQandDQStransitionwithCKtransition •MRScyclewithaddresskeyprograms -.Readlatency2,2.5(

SamsungSamsung Group

三星三星半导体

Samsung

ConsumerMemory

SDRAMProductGuide MemoryDivision November2007

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

DDR256Mb

文件:291.04 Kbytes Page:26 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256MbsTSOPII

文件:91.5 Kbytes Page:18 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256MbsTSOPII

文件:91.5 Kbytes Page:18 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256MbsTSOPII

文件:91.5 Kbytes Page:18 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256MbsTSOPII

文件:91.5 Kbytes Page:18 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256MbsTSOPII

文件:91.5 Kbytes Page:18 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256Mb

文件:235.33 Kbytes Page:25 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256Mb

文件:235.33 Kbytes Page:25 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256Mb

文件:235.33 Kbytes Page:25 Pages

SamsungSamsung Group

三星三星半导体

Samsung

256Mb

文件:235.33 Kbytes Page:25 Pages

SamsungSamsung Group

三星三星半导体

Samsung

K4H560438产品属性

  • 类型

    描述

  • 型号

    K4H560438

  • 制造商

    SAMSUNG

  • 制造商全称

    Samsung semiconductor

  • 功能描述

    128Mb DDR SDRAM

更新时间:2024-5-22 16:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
SAMSUNG/三星
QQ咨询
SOP
868
全新原装 研究所指定供货商
SAM
23+
589610
新到现货 原厂一手货源 价格秒杀代理!
SAMSUNG
0510+
TSOP66
12
一级代理,专注军工、汽车、医疗、工业、新能源、电力
SAMSUNG
2020+
原厂封装
3330
专营军工航天芯片,只做全新原装,价格超低!
SAMSUNG/三星
22+
TSOP66
5000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
SAMSUNG/三星
22+
TSOP
12245
现货,原厂原装假一罚十!
SAMSUNG/三星
22+
TSOP
6521
只做原装正品现货!或订货假一赔十!
SAMSUNG/三星
TSOP
265209
假一罚十原包原标签常备现货!
SAMSUNG
09+
BGA
5500
原装无铅,优势热卖
SAMSANG
19+
TSOP
256800
原厂代理渠道,每一颗芯片都可追溯原厂;

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