General Description

The EL4585C is a PLL (Phase Lock Loop) sub system, designed for video applications, but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan rate, and phase locked to it.

Features

• 36 MHz, general purpose PLL

• 8 FSC timing. (Use the EL4584 for 4 FSC)

• Compatible with EL4583C Sync Separator

• VCXO, Xtal, or LC tank oscillator

• k2nS jitter (VCXO)

• User-controlled PLL capture and lock

• Compatible with NTSC and PAL TV formats

• 8 pre-programmed popular TV scan rate clock divisors

• Single 5V, low current operation

Applications

• Pixel Clock regeneration

• Video compression engine (MPEG) clock generator

• Video Capture or digitization

• PIP (Picture In Picture) timing generator

• Text or Graphics overlay timing