Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range

Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range

Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range

Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range

Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range

Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS

The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range

Quad 2-input AND gate, high-voltage silicon-gate CMOS

Quad 2-Input AND Gate

20-Bit, 20 MSPS, Differential SAR ADC

FEATURES ► High performance ► Throughput: 20MSPS, 77.50ns conversion latency ► INL: ±4ppm (typical), ±8ppm (maximum) ► Dynamic range: 94.6dBFS ► SNR/THD ► 94dB (typical)/−117.3dB (typical) at fIN = 1kHz ► 93.7dB (typical)/−103.7dB (typical) at fIN = 1MHz ► Noise spectral density: −164.6dBF

20-Bit, 20 MSPS, Differential SAR ADC

FEATURES ► High performance ► Throughput: 20MSPS, 77.50ns conversion latency ► INL: ±4ppm (typical), ±8ppm (maximum) ► Dynamic range: 94.6dBFS ► SNR/THD ► 94dB (typical)/−117.3dB (typical) at fIN = 1kHz ► 93.7dB (typical)/−103.7dB (typical) at fIN = 1MHz ► Noise spectral density: −164.6dBF

20-Bit, 20 MSPS, Differential SAR ADC

FEATURES ► High performance ► Throughput: 20MSPS, 77.50ns conversion latency ► INL: ±4ppm (typical), ±8ppm (maximum) ► Dynamic range: 94.6dBFS ► SNR/THD ► 94dB (typical)/−117.3dB (typical) at fIN = 1kHz ► 93.7dB (typical)/−103.7dB (typical) at fIN = 1MHz ► Noise spectral density: −164.6dBF

Quad 2-input AND gate

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

Flat Vibration Switch - Breadboard friendly

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