NAND gates provide the system designer with direct implementation of the NAND function

Description The IW4011B NAND gates provide the system designer with direct implementation of the NAND function. Features • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 at 18 V over full package-temperature range 100 nA at 18 V and 25°C • Noise margin (over full package t

Noise margin

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS The IW4011B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS

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Quad 2-Input NAND Gate

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS

文件：110.24 Kbytes Page：4 Pages

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS

文件：110.24 Kbytes Page：4 Pages

Quad 2-Input NAND Gate

Quadruple 2-input NAND gate

DESCRIPTION The HEF4011B provides the positive quadruple 2-input NAND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance

EPDM Snap-In Liquid Tight Bushings

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2 MHz Function Generator

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Function Generators

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EPDM Snap-In Liquid Tight Bushings

文件：95.85 Kbytes Page：1 Pages