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ISPLSI1032E-70价格
参考价格：￥87.8202
型号：ISPLSI1032E-70LJNI 品牌：Lattice 备注：这里有ISPLSI1032E-70多少钱，2025年最近7天走势，今日出价，今日竞价，ISPLSI1032E-70批发/采购报价，ISPLSI1032E-70行情走势销售排行榜，ISPLSI1032E-70报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 |   | ||
In-System Programmable High Density PLD Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
In-System Programmable High Density PLD Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic 文件：301.86 Kbytes Page：17 Pages | Lattice 莱迪思 | | ||
High-Density Programmable Logic 文件：301.86 Kbytes Page：17 Pages | Lattice 莱迪思 | | ||
High-Density Programmable Logic 文件：301.86 Kbytes Page：17 Pages | Lattice 莱迪思 | | ||
High-Density Programmable Logic 文件：301.86 Kbytes Page：17 Pages | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | | ||
High-Density Programmable Logic Description The ispLSI and pLSI 1032E are High Density Programmable Logic Devices containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements | Lattice 莱迪思 | |
ISPLSI1032E-70产品属性
- 类型
描述
- 型号
ISPLSI1032E-70
- 功能描述
CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V
- RoHS
否
- 制造商
Lattice
- 存储类型
EEPROM
- 大电池数量
128
- 最大工作频率
333 MHz
- 延迟时间
2.7 ns
- 可编程输入/输出端数量
64
- 工作电源电压
3.3 V
- 最大工作温度
+ 90 C
- 最小工作温度
0 C
- 封装/箱体
TQFP-100
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Lattice |
24+ |
PLCC84 |
17900 |
一级授权代理原装现货热卖 |
|||
LATTICE/莱迪斯 |
25+ |
PLCC |
32360 |
LATTICE/莱迪斯全新特价ISPLSI1032E-70LJNI即刻询购立享优惠#长期有货 |
|||
ISPLSI1032E-70LJ |
22 |
22 |
|||||
LATTICE |
24+ |
PLCC84 |
13500 |
免费送样原盒原包现货一手渠道联系 |
|||
Lattice(莱迪斯) |
24+ |
N/A |
7413 |
原厂可订货,技术支持,直接渠道。可签保供合同 |
|||
LATTICE/莱迪斯 |
23+ |
PLCC84 |
12500 |
全新原装现货,假一赔十 |
|||
LATTICE |
25+ |
PLCC84 |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
LATTICE/莱迪斯 |
24+ |
PLCC |
3520 |
只做原厂渠道 可追溯货源 |
|||
Lattice |
23+ |
PLCC-84 |
7000 |
绝对全新原装!100%保质量特价!请放心订购! |
|||
Lattice(莱迪斯) |
24+ |
标准封装 |
7809 |
原厂渠道供应,大量现货,原型号开票。 |
ISPLSI1032E-70芯片相关品牌
ISPLSI1032E-70规格书下载地址
ISPLSI1032E-70参数引脚图相关
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ISPLSI1032E-70数据表相关新闻
ISPLSI1032-60LG/883
制造商: Lattice 产品种类: CPLD - 复杂可编程逻辑器件 产品: ispLSI 1032 大电池数量: 128 逻辑数组块数量——LAB: 32 最大工作频率: 83 MHz 传播延迟—最大值: 20 ns 输入/输出端数量: 64 I/O 工作电源电压: 5 V 最小工作温度: - 55 C 最大工作温度: + 125 C 封装 / 箱体: CPGA-84 高度: 3.68 mm
2019-12-18ISPLSI1048C-50LG/883
CPLD - 复杂可编程逻辑器件
2019-12-18ISPLSI1032E-70LJN，lattice专业户，现货支持
德信电子（香港）有限公司 客服经理：林先生 联系电话：0755-33359577
2019-7-22ISPLSI1032E-125LTN，lattice专业户，现货支持
德信电子（香港）有限公司 客服经理：林先生 联系电话：0755-33359577
2019-7-22ISPLSI1032E-70LTN，lattice专业户，现货支持
德信电子（香港）有限公司 客服经理：林先生 联系电话：0755-33359577
2019-7-22ISPLSI1016E-80LJN，lattice专业户，现货支持
德信电子（香港）有限公司 客服经理：林先生 联系电话：0755-33359577
2019-7-22
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