256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

DESCRIPTION The ISSI IS62WV2568ALL / IS62WV2568BLL are highspeed, 2M bit static RAMs organized as 256K words by 8 bits. It is fabricated using ISSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high performance and low po

256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

DESCRIPTION The ISSI IS62WV2568ALL / IS62WV2568BLL are highspeed, 2M bit static RAMs organized as 256K words by 8 bits. It is fabricated using ISSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high performance and low po

封装/外壳：32-TFSOP（0.465"，11.80mm 宽） 包装：托盘 描述：IC SRAM 2MBIT PARALLEL 32STSOP I 集成电路（IC） 存储器

封装/外壳：32-TFSOP（0.465"，11.80mm 宽） 包装：托盘 描述：IC SRAM 2MBIT PARALLEL 32STSOP I 集成电路（IC） 存储器

256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

DESCRIPTION The ISSI IS62WV2568ALL / IS62WV2568BLL are highspeed, 2M bit static RAMs organized as 256K words by 8 bits. It is fabricated using ISSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high performance and low po

256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

FEATURES • High-speed access time: 45ns, 55ns, 70ns • CMOS low power operation – 36 mW (typical) operating – 9 μW (typical) CMOS standby • TTL compatible interface levels • Single power supply – 1.65V--2.2V Vcc (62WV2568ALL) – 2.5V--3.6V Vcc (62WV2568BLL) • Fully static operation: no cloc

256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

FEATURES • High-speed access time: 45ns, 55ns, 70ns • CMOS low power operation – 36 mW (typical) operating – 9 μW (typical) CMOS standby • TTL compatible interface levels • Single power supply – 1.65V--2.2V Vcc (62WV2568ALL) – 2.5V--3.6V Vcc (62WV2568BLL) • Fully static operation: no cloc

256K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

DESCRIPTION The ISSI IS62WV2568ALL / IS62WV2568BLL are highspeed, 2M bit static RAMs organized as 256K words by 8 bits. It is fabricated using ISSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high performance and low po