64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

DESCRIPTION The ISSI IS61LV6416/IS61LV6416L is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ISSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as

封装/外壳：48-TFBGA 包装：托盘 描述：IC SRAM 1MBIT PARALLEL 48MINIBGA 集成电路（IC） 存储器

封装/外壳：48-TFBGA 包装：托盘 描述：IC SRAM 1MBIT PARALLEL 48MINIBGA 集成电路（IC） 存储器

64K x 16 Hight Speed SRAM with 3.3V

DESCRIPTION The ICSI IC61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with l

64K x 16 Hight Speed SRAM with 3.3V

DESCRIPTION The ICSI IC61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with l

64K x 16 Hight Speed SRAM with 3.3V

DESCRIPTION The ICSI IC61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with l

64K x 16 Hight Speed SRAM with 3.3V

DESCRIPTION The ICSI IC61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with l

64K x 16 Hight Speed SRAM with 3.3V

DESCRIPTION The ICSI IC61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with l