型号 功能描述 生产厂家 企业 LOGO 操作
IS61LF102418B

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

IS61LF102418B

Synchronous SRAM

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, SYNCHRONOUS FLOW-THROUGH SRAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs an

ISSI

矽成半导体

封装/外壳:100-LQFP 包装:卷带(TR) 描述:IC SRAM 18MBIT PARALLEL 100LQFP 集成电路(IC) 存储器

ETC

知名厂家

封装/外壳:100-LQFP 包装:托盘 描述:IC SRAM 18MBIT PARALLEL 100LQFP 集成电路(IC) 存储器

ETC

知名厂家

256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs a

ISSI

矽成半导体

256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM

文件:276.75 Kbytes Page:35 Pages

ISSI

矽成半导体

更新时间:2026-3-2 18:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ISSI, Integrated Silicon Solut
18500
全新原厂原装现货!受权代理!可送样可提供技术支持!
ISSI Integrated Silicon Soluti
22+
100LQFP (14x20)
9000
原厂渠道,现货配单
ISSI(美国芯成)
2447
LQFP-100(14x20)
315000
72个/托盘一级代理专营品牌!原装正品,优势现货,长
ISSI, Integrated Silicon Solu
23+
100-LQFP14x20
7300
专注配单,只做原装进口现货
ISSI, Integrated Silicon Solut
24+
100-LQFP(14x20)
56200
一级代理/放心采购
ISSI Integrated Silicon Solut
25+
100-LQFP
9350
独立分销商 公司只做原装 诚心经营 免费试样正品保证
ISSI(美国芯成)
24+
LQFP-100(14x20)
16508
原装正品现货支持实单
ISSI(美国芯成)
2021+
LQFP-100(14x20)
499
ISSI
23+
TQFP100
10800
原厂授权一级代理,专业海外优势订货,价格优势、品种
ISSI
25+
电联咨询
7800
公司现货,提供拆样技术支持

IS61LF102418B数据表相关新闻