封装/外壳：84-TFBGA 包装：卷带（TR） 描述：IC DRAM 1GBIT PARALLEL 84TWBGA 集成电路（IC） 存储器

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential