HEXFET TRANSISTORS SURFACE MOUNT (LCC-18)

REPETITIVE AVALANCHE AND dv/dt RATED HEXFET® TRANSISTORS SURFACE MOUNT (LCC-18) The leadless chip carrier (LCC) package represents the logical next step in the continual evolution of surface mount technology. Desinged to be a close replacement for the TO-39 package, the LCC will give designers th

HiRel MOSFETs

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MOSFETs and JFETs

Multiple Small-Signal Transistors

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Simple Drive Requirements

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P?밅HANNEL POWER MOSFET

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Simple Drive Requirements

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High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

High-Voltage Current-Mode PWM Controller

General Description The Supertex HV9123 is a Switch Mode Power Supply (SMPS) controller subsystem that can start and run directly from almost any DC input, from a 12V battery to a rectified and filtered 240VAC line. It contains all the elements required to build a single-switch converter except

1:10 LVCMOS FANOUT BUFFER

The MPC9120 is a 1:10 LVCMOS fanout buffer targeted to support Intel based Pentium II microprocessor chip sets. The device features 10 low skew outputs optimized to drive the clock inputs of standard unbuffered SO–DIMM SDRAM modules. Standard unbuffered SO–DIMM SDRAM modules require two clocks pe