Octal 3-State Inverting Transparent Latch High-Performance Silicon-Gate CMOS

Octal 3-State Inverting Transparent Latch High-Performance Silicon-Gate CMOS The IN74HC533A is identical in pinout to the LS/ALS533. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent t

Octal 3-State Inverting Transparent Latch

Octal D-Type Latch, INV (3-State)

Octal D-type transparent latch; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT533 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state inverting outputs for bus oriented applications • Common 3-state outp

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

Features • Common Latch-Enable Control • Common Three-State Output Enable Control • Buffered Inputs • Three-State Outputs • Bus Line Driving Capacity • Typical Propagation Delay = 13ns at VCC = 5V, CL = 15pF, TA = 25oC (Data to Output) • Fanout (Over Temperature Range) - Standard Outputs

High Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：50.92 Kbytes Page：9 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：286.35 Kbytes Page：14 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：288.18 Kbytes Page：14 Pages