Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS

文件：237.08 Kbytes Page：6 Pages

Octal 3-State Noninverting D Flip-Flop (High-Performance Silicon-Gate CMOS)

文件：115.13 Kbytes Page：5 Pages

Octal 3-State Noninverting D Flip-Flop (High-Performance Silicon-Gate CMOS)

Octal 3-State Noninverting D Flip-Flop (High-Performance Silicon-Gate CMOS)

Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS

文件：237.08 Kbytes Page：6 Pages

Octal 3-State Noninverting D Flip-Flop (High-Performance Silicon-Gate CMOS)

文件：115.13 Kbytes Page：5 Pages

Octal 3-State Noninverting D Flip-Flop (High-Performance Silicon-Gate CMOS)

文件：115.13 Kbytes Page：5 Pages

Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS

文件：237.08 Kbytes Page：6 Pages

Octal D-Type Flip-Flop (3-State)

Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC374; 74HCT374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive,

Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive,

OCTAL D-TYPE FLIP-FLOP POSITIVE EDGE TRIGGER 3-STATE

文件：230.9 Kbytes Page：5 Pages

Octal 3?뭆tate Non?묲nverting D Flip?묯lop

文件：130.74 Kbytes Page：9 Pages