8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC299A isidenticalinpinoutto the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC2

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC299A isidenticalinpinoutto the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC2

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS

8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC299A isidenticalinpinoutto the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC2

8-Bit Universal Shift/Storage Register (3-State)

8-bit universal shift register; 3-state

1. General description The 74HC299 is an 8-bit universal shift register with 3-state outputs. It contains eight edge-triggered D-type flip-flops and the interstage logic necessary to perform synchronous shift-right, shift-left, parallel load and hold operations. The type of operation is determi

8-bit universal shift register; 3-state

8-bit universal shift register; 3-state

GENERAL DESCRIPTION The 74HC/HCT299 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Multiplexed inputs/outputs provide improved bit density • Four operating modes: – s

8-bit universal shift register; 3-state

GENERAL DESCRIPTION The 74HC/HCT299 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Multiplexed inputs/outputs provide improved bit density • Four operating modes: – s

8-bit universal shift register; 3-state