OCTAL 3-STATE INVERTING TRANSPARENT LATCH

The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. The data

Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS

The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5

Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS

OCTAL 3-STATE INVERTING TRANSPARENT LATCH

The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. The data

Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS

The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5

Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS

The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5

OCTAL 3-STATE INVERTING TRANSPARENT LATCH

The IN74ACT533 is identical in pinout to the LS/ALS533, HC/HCT533. The IN74ACT533 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. The data

Octal 3-state inverting transparent latch high-speed silicon-gate CMOS

Octal Transparent Latch with 3-STATE Outputs

General Description The ACT533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus

Octal Transparent Latch with 3-STATE Outputs

General Description The ACT533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus

Octal Transparent Latch with 3-STATE Outputs

General Description The ACT533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus

Octal Transparent Latch with 3-STATE Outputs

General Description The ACT533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus

OCTAL TRANSPARENT LATCH, 3-STATE

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