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型号 功能描述 生产厂家 企业 LOGO 操作
IN74AC112D

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

The IN74AC112 is identical in pinout to the LS/ALS112, HC/HCT112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. • Output

IKSEMICON

IN74AC112D

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

The IN74AC112 is identical in pinout to the LS/ALS112, HC/HCT112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. • Output

INTEGRAL

Integral Corp.

IN74AC112D

Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

The IN74AC112 is identical in pinout to the LS/ALS112, HC/HCT112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.• Outputs Direct

INTEGRAL

Integral Corp.

Dual JK Negative Edge-Triggered Flip-Flop

Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will p

HITACHIHitachi Semiconductor

日立日立公司

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

Dual J-K Flip Flop with Preset and Clear The TC74AC112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low pow

TOSHIBA

东芝

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

文件:331.08 Kbytes Page:6 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

文件:331.08 Kbytes Page:6 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

文件:331.08 Kbytes Page:6 Pages

TI

德州仪器

IN74AC112D产品属性

  • 类型

    描述

  • 型号

    IN74AC112D

  • 制造商

    INTEGRAL

  • 制造商全称

    INTEGRAL

  • 功能描述

    Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

更新时间:2026-5-22 13:26:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LOWPOWER
26+
362652
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IKSEMI
24+
DIP40
80000
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NNO
23+
DIP
10000
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IKSEMICON
2450+
DIP40
6540
只做原装正品假一赔十为客户做到零风险!!
INNO
25+
DIP24
2650
原装优势!绝对公司现货
SAMSUNG/三星
25+
DIP40
880000
明嘉莱只做原装正品现货
INNO
23+
53284
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N/A
23+
80000
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HYNIX
23+
SOP14
50000
全新原装正品现货,支持订货
HYNIX
25+23+
SOP14
31257
绝对原装正品全新进口深圳现货

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