位置:首页 > IC中文资料第6259页 > HD74AC112
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
HD74AC112 | Dual JK Negative Edge-Triggered Flip-Flop Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will p | HitachiHitachi Semiconductor 日立日立公司 | ||
HD74AC112 | Dual JK Negative Edge-Triggered Flip-Flop Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will | RENESAS 瑞萨 | ||
HD74AC112 | Standard IC>General-Purpose Logics>HD74AC Series | RENESAS 瑞萨 | ||
Dual JK Negative Edge-Triggered Flip-Flop Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will | RENESAS 瑞萨 | |||
Dual JK Negative Edge-Triggered Flip-Flop Description The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to each flipflop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will | RENESAS 瑞萨 | |||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Pro | TI 德州仪器 | |||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件:331.08 Kbytes Page:6 Pages | TI 德州仪器 | |||
Dual j-k Flip-Flop with Set and Reset 文件:228.31 Kbytes Page:8 Pages | TI 德州仪器 | |||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件:336.12 Kbytes Page:11 Pages | TI 德州仪器 | |||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件:331.08 Kbytes Page:6 Pages | TI 德州仪器 |
HD74AC112产品属性
- 类型
描述
- 型号
HD74AC112
- 制造商
HITACHI
- 制造商全称
Hitachi Semiconductor
- 功能描述
Dual JK Negative Edge-Triggered Flip-Flop
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
HITACHI/日立 |
24+ |
NA/ |
220 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
HIT |
23+ |
SOP44 |
20000 |
全新原装假一赔十 |
|||
HITACHI/日立 |
25+ |
DIP-16 |
65428 |
百分百原装现货 实单必成 |
|||
HIT |
06+ |
SOP44 |
1990 |
全新原装进口自己库存优势 |
|||
HIT |
24+/25+ |
850 |
原装正品现货库存价优 |
||||
HITACHI |
24+ |
SOP-14 |
5000 |
全新原装正品,现货销售 |
|||
HITACHI |
23+ |
DIP-16 |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
|||
HIT |
24+ |
SOP5.2MM |
340 |
只做原装正品现货 欢迎来电查询15919825718 |
|||
HITACHI |
25+23+ |
DIP16 |
30212 |
绝对原装正品全新进口深圳现货 |
|||
HITACHI/日立 |
25+ |
SOP14 |
9800 |
全新原装现货,假一赔十 |
HD74AC112芯片相关品牌
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