3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

DESCRIPTION: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock. It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs. FEATURES: • 0.5 MICRON CMOS Technology •

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

DESCRIPTION: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock. It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs. FEATURES: • 0.5 MICRON CMOS Technology •

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

DESCRIPTION: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock. It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs. FEATURES: • 0.5 MICRON CMOS Technology •