Low Skew Output Buffer

General Description The ICS9112 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 2

Low Skew Output Buffer

General Description The ICS9112-16 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds fro

Low Skew Output Buffer

General Description The ICS9112-17 is a high performance, low skew, low jitter zero delay buffer. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speed

Zero Delay, Low Skew Buffer

Description The ICS9112-18 is a low jitter, low-skew, high performance PLL based zero delay buffer for high speed applications. Based on ICS’s proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 160 MHz at 3.3 V. The ICS9112-18 inc

Low Skew Output Buffer

Features • Frequency range 0 - 133 MHz (3.3V) • Less than 200 ps Jitter between outputs • Skew controlled outputs • Skew less than 250 ps between outputs • Available in 8 pin 150 mil SOIC & 173 mil TSSOP packages. • 3.3V ±10 operation

Low Skew Output Buffer

General Description The ICS9112-26 is a high performance, low skew, low jitter clock driver. It is designed to distribute high speed clocks in PC systems operating at speeds from 0 to 133 MHz. The ICS9112-26 comes in an eight pin 150 mil SOIC package. It has four output clocks. Features • Fre

Low Skew PCI / PCI-X Buffer

Features • Frequency range 0 - 140 MHz (3.3V) • Less than 200 ps Jitter between outputs • Skew controlled outputs

Low Skew PCI / PCI-X Buffer

General Description The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz. The ICS9112-27 is characterized for operation from -40°C to 85°C for automot

Low Skew Output Buffer

General Description The ICS9112-28 is a high performance, low skew, low jitter clock driver. It is designed to distribute high speed clocks in PC systems operating at speeds from 0 to 133 MHz. The ICS9112-28 comes in an eight pin 150 mil SOIC package. It has four output clocks. Features • Freq

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-31/32 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-31/32 generates 106.25 MHz from a 25 MHz crystal. Features • Generates 106.25 MHz clocks from a 25 MHz crystal • Less than 45ps one sigma jitter (15ps typ.)

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-33/34 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-33/34 generates 106.25 MHz from a 21.25 MHz crystal. Features • Generates 106.25 MHz clocks from a 21.25 MHz crystal • Less than 45ps one sigma jitter (10ps

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-33/34 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-33/34 generates 106.25 MHz from a 21.25 MHz crystal. Features • Generates 106.25 MHz clocks from a 21.25 MHz crystal • Less than 45ps one sigma jitter (10ps

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-35/36 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-35/36 generates 106.25 MHz from a 17 MHz crystal. Features • Generates 106.25 MHz clocks from a 17 MHz crystal • Less than 45ps one sigma jitter (15ps typ.)

Frequency Generator for Gigabit Ethernet Systems

General Description The ICS9112-43/44 is a high speed clock generator designed to support Gigabit Ethernet system requirements. The ICS9112-43/44 generates 125 MHz from a 20 MHz crystal. Features • Generates 125 MHz clocks from a 20 MHz crystal • Less than 45ps one sigma jitter (15ps typ.) •

Low Skew Output Buffer

Features • Zero input - output delay • Frequency range 25 - 133 MHz (3.3V) • High loop filter bandwidth ideal for Spread Spectrum applications. • Less than 200 ps Jitter between outputs • Skew controlled outputs • Skew less than 250 ps between outputs • Available in 8 pin 150 mil SOIC or

Zero Delay, Low Skew Buffer

Description The ICS9112-18 is a low jitter, low-skew, high performance PLL based zero delay buffer for high speed applications. Based on ICS’s proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 160 MHz at 3.3 V. The ICS9112-18 inc

Zero Delay, Low Skew Buffer

Description The ICS9112-18 is a low jitter, low-skew, high performance PLL based zero delay buffer for high speed applications. Based on ICS’s proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 160 MHz at 3.3 V. The ICS9112-18 inc

Low Skew Output Buffer

General Description The ICS9112 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 2

Low Skew Output Buffer

General Description The ICS9112 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds from 2

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-31/32 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-31/32 generates 106.25 MHz from a 25 MHz crystal. Features • Generates 106.25 MHz clocks from a 25 MHz crystal • Less than 45ps one sigma jitter (15ps typ.)

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-31/32 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-31/32 generates 106.25 MHz from a 25 MHz crystal. Features • Generates 106.25 MHz clocks from a 25 MHz crystal • Less than 45ps one sigma jitter (15ps typ.)

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-35/36 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-35/36 generates 106.25 MHz from a 17 MHz crystal. Features • Generates 106.25 MHz clocks from a 17 MHz crystal • Less than 45ps one sigma jitter (15ps typ.)

Frequency Generator for Fibre Channel Systems

General Description The ICS9112-35/36 are high-speed clock generators designed to support fibre channel system requirements. The ICS9112-35/36 generates 106.25 MHz from a 17 MHz crystal. Features • Generates 106.25 MHz clocks from a 17 MHz crystal • Less than 45ps one sigma jitter (15ps typ.)

Frequency Generator for Gigabit Ethernet Systems

General Description The ICS9112-43/44 is a high speed clock generator designed to support Gigabit Ethernet system requirements. The ICS9112-43/44 generates 125 MHz from a 20 MHz crystal. Features • Generates 125 MHz clocks from a 20 MHz crystal • Less than 45ps one sigma jitter (15ps typ.) •

Frequency Generator for Gigabit Ethernet Systems

General Description The ICS9112-43/44 is a high speed clock generator designed to support Gigabit Ethernet system requirements. The ICS9112-43/44 generates 125 MHz from a 20 MHz crystal. Features • Generates 125 MHz clocks from a 20 MHz crystal • Less than 45ps one sigma jitter (15ps typ.) •

Low Skew Output Buffer

General Description The ICS9112-16 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speeds fro

Low Skew Output Buffer

General Description The ICS9112-26 is a high performance, low skew, low jitter clock driver. It is designed to distribute high speed clocks in PC systems operating at speeds from 0 to 133 MHz. The ICS9112-26 comes in an eight pin 150 mil SOIC package. It has four output clocks. Features • Fre

Low Skew Output Buffer

General Description The ICS9112-17 is a high performance, low skew, low jitter zero delay buffer. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in PC systems operating at speed

Low Skew PCI / PCI-X Buffer

General Description The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz. The ICS9112-27 is characterized for operation from -40°C to 85°C for automot

Low Skew Output Buffer

General Description The ICS9112-28 is a high performance, low skew, low jitter clock driver. It is designed to distribute high speed clocks in PC systems operating at speeds from 0 to 133 MHz. The ICS9112-28 comes in an eight pin 150 mil SOIC package. It has four output clocks. Features • Freq

Low Skew Output Buffer

文件：97.56 Kbytes Page：8 Pages

Low Skew Output Buffer

文件：97.56 Kbytes Page：8 Pages

封装/外壳：8-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:4 140MHZ 8TSSOP 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC BUFFER ZD HI PERFORM 8-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

Low Skew Output Buffer

文件：97.56 Kbytes Page：8 Pages

SHIELDED ADJUSTABLE RF COILS

[J.W.MILLER]

ROUND INSTRUMENTATION HANDLES

[KEYSTONE] ROUND INSTRUMENTATION HANDLES FERRULES HANDLE MOUNTING SCREWS

Isolated, Sigma-Delta ADCs with SPI

FEATURES ► 2 (ADE9112) or 3 (ADE9113) channel isolated, simultaneously sampling Σ-Δ ADCs, with integrated isoPower, isolated dc-to-dc converters ► 3 (ADE9103) channel nonisolated, simultaneously sampling Σ-Δ ADCs ► Synchronization of multiple ADE9103/ADE9112/ADE9113 devices ► 4-wire SPI wit

Isolated, Sigma-Delta ADCs with SPI

FEATURES ► 2 (ADE9112) or 3 (ADE9113) channel isolated, simultaneously sampling Σ-Δ ADCs, with integrated isoPower, isolated dc-to-dc converters ► 3 (ADE9103) channel nonisolated, simultaneously sampling Σ-Δ ADCs ► Synchronization of multiple ADE9103/ADE9112/ADE9113 devices ► 4-wire SPI wit

Releasable Type T Rivets

文件：117.9 Kbytes Page：1 Pages