Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Selectable differential CLK/nCLK or LVPECL clock inputs • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • PCLK/nPCLK pair can accept the following differential input levels: LVPECL, CML, SST

Four differential LVDS output pairs

文件：290.45 Kbytes Page：17 Pages

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Selectable differential CLK/nCLK or LVPECL clock inputs • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • PCLK/nPCLK pair can accept the following differential input levels: LVPECL, CML, SST

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Selectable differential CLK/nCLK or LVPECL clock inputs • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • PCLK/nPCLK pair can accept the following differential input levels: LVPECL, CML, SST

INDUCTORS Inductors Designed for Nationals 150 KHz SIMPLE SWITCHERTM

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AXL E EC DI8 DO4 2A M12 6P

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文件：111.08 Kbytes Page：6 Pages