LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS8523I is a low skew, high performance 1-to-4 Differential-to-HSTL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8523I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential i

LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS8523I is a low skew, high performance 1-to-4 Differential-to-HSTL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8523I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential i

LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS8523I is a low skew, high performance 1-to-4 Differential-to-HSTL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8523I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential i

LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS8523I is a low skew, high performance 1-to-4 Differential-to-HSTL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8523I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential i

Low Skew, 1-to-4, Differential-to-HSTL Fantout Buffer

Features • Four differential HSTL compatible outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, HSTL, HCSL, SSTL • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, C

Low Skew, 1-to-4, Differential-to-HSTL Fantout Buffer

Features • Four differential HSTL compatible outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, HSTL, HCSL, SSTL • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, C

T1/E1 Interface Modules

文件：176.78 Kbytes Page：1 Pages

PWM/PFM Step-down DC-DC Controller

文件：525.56 Kbytes Page：5 Pages

OPERATION INSTRUCTION

文件：1.97588 Mbytes Page：17 Pages