4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

4-bit synchronous decade counter with synchronous reset

DESCRIPTION The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset

Decade Counter with Asynchronous Clear

Decade Counter with Asynchronous Clear

Decade Counter with Asynchronous Clear

SYNCHRONOUS PROGRAMMABLE 4-BIT COUNTERS

SYNCHRONOUS PROGRAMMABLE 4-BIT COUNTERS

C2MOS DIGITAL INTERGRATED CIRCUIT SILICON MONOLITHIC