DESCRIPTION

The HEF40162B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset (SR)), buffered outputs from all four bit positions (O0 to O3) and a terminal count output (TC).