Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

1. General description The HEF4013B is a dual D-type flip-flop with set and reset; positive-edge trigger. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. Schmitt-trigger action on the clock input makes the circuit

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

1. General description The HEF4013B is a dual D-type flip-flop with set and reset; positive-edge trigger. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. Schmitt-trigger action on the clock input makes the circuit

Dual D-type flip-flop

DESCRIPTION The HEF4013B is a dual D-type flip-flop which features independent set direct (SD), clear direct (CD), clock inputs (CP) and outputs (O, O). Data is accepted when CP is LOW and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct

Dual D-type flip-flop

1. General description The HEF4013B is a dual D-type flip-flop with set and reset; positive-edge trigger. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. Schmitt-trigger action on the clock input makes the circuit

Tolerant of slow clock rise and fall times

Tolerant of slow clock rise and fall times

Standardized symmetrical output characteristics

文件：129.83 Kbytes Page：16 Pages

封装/外壳：14-DIP（0.300"，7.62mm） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14DIP 集成电路（IC） 触发器

Dual D-type flip-flop

文件：770.97 Kbytes Page：17 Pages

Dual D-type flip-flop

Tolerant of slow clock rise and fall times

Tolerant of slow clock rise and fall times

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14SO 集成电路（IC） 触发器

Tolerant of slow clock rise and fall times

Dual D-type flip-flop

文件：770.97 Kbytes Page：17 Pages

Standardized symmetrical output characteristics

文件：129.83 Kbytes Page：16 Pages

Dual D-type flip-flop

Dual D-type flip-flop

Standardized symmetrical output characteristics

文件：129.83 Kbytes Page：16 Pages

Tolerant of slow clock rise and fall times

Tolerant of slow clock rise and fall times

Standardized symmetrical output characteristics

文件：129.83 Kbytes Page：16 Pages

Dual D-type flip-flop

文件：770.97 Kbytes Page：17 Pages

IEC Connector C13, Rewireable, Angled

Description - Connector: Screwing cable terminal, Pin temperature 70 °C, Protection class I, Cable - Note: Please order pvc strain relief seperately, mating strain reliefs please find under accessories.

IEC Connector C13, Rewireable, Angled

文件：233.7 Kbytes Page：3 Pages

EPDM Snap-In Liquid Tight Bushings

文件：95.85 Kbytes Page：1 Pages

Clear Acrylic Lens Holder Hardware Kit for HalloWing

文件：472.89 Kbytes Page：2 Pages

Sine and square waveforms up to 12 MHz

文件：1.15133 Mbytes Page：2 Pages

Dual D Flip-Flop

CMOS DUAL D-TYPE FLIP-FLOP

CMOS Dual 鈥楧鈥?Type Flip-Flop

Dual D-Type Flip-Flop

CMOS DUAL D-TYPE FLIP-FLOP

Dual D Flip-Flop

Dual D Flip-Flop

Dual D-Type Flip-Flop

Dual D-Type Flip-Flop

CMOS DUAL D-TYPE FLIP-FLOP

CMOS DUAL D-TYPE FLIP-FLOP

Dual D Flip-Flop

NAND GATES

DUAL 鈥橠鈥?. TYPE FLIP.FLOP

NAND GATES

Dual D-type Flip Flop

Dual Type D Flip-Flop

Dual Type D Flip-Flop

Dual Type D Flip−Flop

Dual Type D Flip-Flop

Dual Type D Flip-Flop

Dual Type D Flip−Flop

Dual Type D Flip-Flop

COMPLEMENTARY METAL OXIDE SILICON

C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

DUAL D-TYPE FLIP-FLOP

Dual D-Type Flip Flop