3-Line-to-8-Line Decoders / Demultiplexers

The HD74LS138 decodes one-of-eight line dependent on the conditions at the three binaly select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external

3-Line-to-8-Line Decoders / Demultiplexers

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Low Power Schottky Logic

Features Demultiplexing capability Multiple Input Enables for parallel expansion Active Low Mutually Exclusive Outputs Input Clamp Diodes Limit High Speed Termination Effects Direct drop-in replacement for obsolete components in long term programs.

Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

Decoder/Demultiplexer

General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. Whe

Low Power Schottky Logic

文件：520.82 Kbytes Page：4 Pages

Decoders/Demultiplexers

文件：165.29 Kbytes Page：8 Pages