Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)

Description The HD74HC240 is an inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd = 10 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL L

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

Description The HD74HC240 is an inverting buffer and has two active low enables (1Gand 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd= 10 ns typ (CL= 50 pF) • High Output Current: Fanout of 15 LSTTL

Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)

Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

Description The HD74HC240 is an inverting buffer and has two active low enables (1Gand 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd= 10 ns typ (CL= 50 pF) • High Output Current: Fanout of 15 LSTTL

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

Description The HD74HC240 is an inverting buffer and has two active low enables (1Gand 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd= 10 ns typ (CL= 50 pF) • High Output Current: Fanout of 15 LSTTL

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

Description The HD74HC240 is an inverting buffer and has two active low enables (1Gand 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd= 10 ns typ (CL= 50 pF) • High Output Current: Fanout of 15 LSTTL

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

Description The HD74HC240 is an inverting buffer and has two active low enables (1Gand 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features • High Speed Operation: tpd= 10 ns typ (CL= 50 pF) • High Output Current: Fanout of 15 LSTTL

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

文件：131.37 Kbytes Page：10 Pages

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

文件：131.37 Kbytes Page：10 Pages

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

文件：131.37 Kbytes Page：10 Pages

General-Purpose Logics-HD/RD74HC Series

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

文件：131.37 Kbytes Page：10 Pages

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs)

文件：131.37 Kbytes Page：10 Pages

Octal buffer/line driver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT240 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: bus driver • ICC category: MSI

Octal buffer/line driver; 3-state; inverting

1. General description The 74HC240; 74HCT240 is an 8-bit inverting buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes t

Octal buffer/line driver; 3-state; inverting

High Speed CMOS Logic

文件：252.61 Kbytes Page：3 Pages

High Speed CMOS Logic

文件：393.34 Kbytes Page：6 Pages