13-input NAND Gate

Description This device contains a single 13-input NAND gate. They perform the boolean functions in positive logic. Features • High Speed Operation: tpd = 12.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1

13-input NAND Gate

Description This device contains a single 13-input NAND gate. They perform the boolean functions in positive logic. Features • High Speed Operation: tpd = 12.5 ns typ (CL = 50 pF) • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1

13-input NAND gate

GENERAL DESCRIPTION The HC133 is an high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. FEATURES • Output capability: standard • ICC

13-input NAND gate

GENERAL DESCRIPTION The HC133 is an high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. FEATURES • Output capability: standard • ICC

13-input NAND gate

GENERAL DESCRIPTION The HC133 is an high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. FEATURES • Output capability: standard • ICC

13 INPUT NAND GATE

DESCRIPTION The M54/74HC133 is a high speed CMOS 13-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 7 stages including buffer output, which gives high no