18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable

Description The HD74ALVC162834A is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Features • Supports PC133 and meets “PC SDRAM registered DIMM specification, Rev. 1.1” • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce

18-bit registered driver with inverted register enable and 30 Ω termination resistors; 3-state

1 General description The 74ALVC162834A is an 18-bit registered driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is

18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

DESCRIPTION The 74ALVC162834A is an 18-bit registered driver. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 12 mA at 3.0 V • MULTIBYTETM flow-through sta

18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

DESCRIPTION The 74ALVC162834A is an 18-bit registered driver. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 12 mA at 3.0 V • MULTIBYTETM flow-through sta

18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

文件：106.65 Kbytes Page：12 Pages

18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

文件：106.65 Kbytes Page：12 Pages