CMOS 18-Bit TTL/GTLP Universal Bus Transceiver

General Description The GTLP16612 is an 18-bit universal bus transceiver which provides TTL to GTLP signal level translation. The device is designed to provide a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High speed backplane o

封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC UNIV BUS TXRX 18BIT 56TSSOP 集成电路（IC） 通用总线功能

封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC UNIV BUS TXRX 18BIT 56TSSOP 集成电路（IC） 通用总线功能

18-bit GTL/GTL to LVTTL/TTL bidirectional universal translator (3-State)

DESCRIPTION The GTL16612 is a high-performance BiCMOS product designed for VCC operation at 3.3 V with I/O compatibility up to 5 V. FEATURES • 18-bit bidirectional bus interface • Translates between GTL/GTL+ logic levels (B ports) and LVTTL/TTL logic levels (A ports) • 5 V I/O tolerant on the

18-bit GTL/GTL to LVTTL/TTL bidirectional universal translator (3-State)

DESCRIPTION The GTL16612 is a high-performance BiCMOS product designed for VCC operation at 3.3 V with I/O compatibility up to 5 V. FEATURES • 18-bit bidirectional bus interface • Translates between GTL/GTL+ logic levels (B ports) and LVTTL/TTL logic levels (A ports) • 5 V I/O tolerant on the

18-bit GTL/GTL to LVTTL/TTL bidirectional universal translator (3-State)

DESCRIPTION The GTL16612 is a high-performance BiCMOS product designed for VCC operation at 3.3 V with I/O compatibility up to 5 V. FEATURES • 18-bit bidirectional bus interface • Translates between GTL/GTL+ logic levels (B ports) and LVTTL/TTL logic levels (A ports) • 5 V I/O tolerant on the

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