FiberEdge® Octal 53GBd PAM4 Linear TIA for PIN, 500μm Pitch, Flip Chip

• Supports 53GBd PAM4 operation per lane\n• Flip chip applications, 500μm I/O lane pitch\n• Low IRN — 1.9μA typical (30GHz BW)\n• High bandwidth — 35GHz typical\n• 6kΩ 差动跨阻增益\n• Overload 2.5mApp, 2.7m ADC\n• 具有可编程增益/输出摆幅的 MGC 和 AGC 模式;

Integrated Circuit Dual, DC Motor Driver

Features: • Linear Output Proportional to Input Voltage • Brake Function Available at Input Open Mode • Brake Function Available at the Time of Simultaneous Application of Input of Forward/Reverse Rotation • Brake Function Available at Forward Rotation Mode • Wide Operating Supply V

High Speed PWM Controller

文件：914.55 Kbytes Page：17 Pages

High Speed PWM Controller

文件：316.15 Kbytes Page：9 Pages

High Speed PWM Controller

文件：303.38 Kbytes Page：15 Pages

High Speed PWM Controller

文件：914.55 Kbytes Page：17 Pages