型号 功能描述 生产厂家 企业 LOGO 操作

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

封装/外壳:28-LCC(J 形引线) 包装:管件 描述:IC CPLD 8MC 15NS 28PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

封装/外壳:28-LCC(J 形引线) 包装:管件 描述:IC CPLD 8MC 15NS 28PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:582.78 Kbytes Page:25 Pages

Lattice

莱迪思

GAL20V8B产品属性

  • 类型

    描述

  • 型号

    GAL20V8B

  • 功能描述

    Electrically-Erasable PLD

更新时间:2025-10-18 22:59:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTE/莱迪斯
24+
NA/
871
优势代理渠道,原装正品,可全系列订货开增值税票
LATTICE
25+
PLCC28
508
原装正品,假一罚十!
LATTICE/莱迪斯
25+
PLCC28
32360
LATTICE/莱迪斯全新特价GAL20V8B-10LJ即刻询购立享优惠#长期有货
LATTICE
03+/05+
PLCC28
508
一级代理,专注军工、汽车、医疗、工业、新能源、电力
Lattice
19
公司优势库存 热卖中!!
LATTICE
24+
PLCC28
90000
一级代理商进口原装现货、价格合理
LATTICE/莱迪斯
2403+
PLCC28
6489
原装现货热卖!十年芯路!坚持!
LATTICE
320
全新原装 货期两周
LATTICE/莱迪斯
24+
PLCC28
22055
郑重承诺只做原装进口现货
LATTICE
23+
PLCC
65480

GAL20V8B数据表相关新闻