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High Performance E2CMOS PLD Generic Array Logic

Description The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide a very flexible 20-pin PLD. CMOS circuitry allows the GAL18V10 to consume much less power when compared to its bipolar

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide a very flexible 20-pin PLD. CMOS circuitry allows the GAL18V10 to consume much less power when compared to its bipolar

Lattice

莱迪思

更新时间:2025-10-19 22:59:01
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTE/莱迪斯
24+
NA/
2374
优势代理渠道,原装正品,可全系列订货开增值税票
LATTICE
25+
PLCC-20
2374
原装正品,假一罚十!
LATT
24+
PLCC20
5373
LATT
2402+
PLCC20
8324
原装正品!实单价优!
LATT
22+
PLCC20
2000
进口原装!现货库存
LATTICE
原厂封装
9800
原装进口公司现货假一赔百
最新
2000
原装正品现货
GAL
23+
DIP
65480
LATTICE
10+
PLCC
42
一级代理,专注军工、汽车、医疗、工业、新能源、电力
LATT
99+
PLCC/20
4883
原装现货海量库存欢迎咨询

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