位置：首页 > IC中文资料第6346页 > GAL18V10-20P
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
High Performance E2CMOS PLD Generic Array Logic Description The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide a very flexible 20-pin PLD. CMOS circuitry allows the GAL18V10 to consume much less power when compared to its bipolar | Lattice 莱迪思 |   | ||
High Performance E2CMOS PLD Generic Array Logic Description The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide a very flexible 20-pin PLD. CMOS circuitry allows the GAL18V10 to consume much less power when compared to its bipolar | Lattice 莱迪思 | |
GAL18V10-20P产品属性
- 类型
描述
- 型号
GAL18V10-20P
- 功能描述
ASIC
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
24+ |
DIP |
46 |
|||||
Lattice |
17+ |
DIP |
6200 |
100%原装正品现货 |
|||
LATTICE |
23+ |
PLCC |
5000 |
原装正品,假一罚十 |
|||
LATTICE/莱迪斯 |
24+ |
PLCC |
9600 |
原装现货,优势供应,支持实单! |
|||
LATTICE |
18+ |
DIP20 |
85600 |
保证进口原装可开17%增值税发票 |
|||
LATTICE/莱迪斯 |
23+ |
20-PLCC9x9 |
9920 |
原装正品，支持实单 |
|||
Lattice |
2023+ |
PLCC20 |
50000 |
原装现货 |
|||
Lattice(莱迪斯) |
25+ |
封装 |
500000 |
源自原厂成本,高价回收工厂呆滞 |
|||
LATTICE |
23+ |
PLCC |
7300 |
专注配单,只做原装进口现货 |
|||
最新 |
2000 |
原装正品现货 |
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GAL18V10-20P规格书下载地址
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DdatasheetPDF页码索引
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