型号 功能描述 生产厂家 企业 LOGO 操作
GAL16V8D-15LP

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

GAL16V8D-15LP

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

GAL16V8D-15LP

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

GAL16V8D-15LP

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

GAL16V8D-15LP

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

GAL16V8D-15LP

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

GAL16V8D-15LP

封装/外壳:20-DIP(0.300",7.62mm) 包装:管件 描述:IC CPLD 8MC 15NS 20DIP 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

GAL16V8D-15LP

High Performance E2CMOS PLD Generic Array Logic

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

封装/外壳:20-DIP(0.300",7.62mm) 包装:托盘 描述:IC CPLD 8MC 15NS 20DIP 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:293.59 Kbytes Page:8 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

GAL16V8D-15LP产品属性

  • 类型

    描述

  • 型号

    GAL16V8D-15LP

  • 功能描述

    SPLD - 简单可编程逻辑器件 5V 16 I/O

  • RoHS

  • 制造商

    Texas Instruments

  • 逻辑系列

    TICPAL22V10Z

  • 大电池数量

    10

  • 最大工作频率

    66 MHz

  • 延迟时间

    25 ns

  • 工作电源电压

    4.75 V to 5.25 V

  • 电源电流

    100 uA

  • 最大工作温度

    + 75 C

  • 最小工作温度

    0 C

  • 安装风格

    Through Hole

  • 封装/箱体

    DIP-24

更新时间:2025-9-23 13:07:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE
23+
DIP
65480
LATTICE
DIP
6688
9917
现货库存
LATTICE?
2023
DIP20
5
全新原装正品现货
12+
DIP
2500
原装现货/特价
LATTICE/莱迪思
23+
NA
7825
原装正品!清仓处理!
LATTICE
97+
DIP20
1570
全新原装进口自己库存优势
LATTICE/莱迪斯
25+
DIP20
13800
原装,请咨询
LATTICE
12+
DIP
4411
一定是全新原装正品只有原装LATTICE现货
LATTICE
2430+
DIP20
8540
只做原装正品假一赔十为客户做到零风险!!
LATTICE
24+
DIP
6250
全新原装现货,欢迎询购!!

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