型号 功能描述 生产厂家 企业 LOGO 操作

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

All Devices Discontinued

Features •HIGH PERFORMANCE E2CMOS®TECHNOLOGY —3.5 ns Maximum Propagation Delay —Fmax = 250 MHz —3.0 ns Maximum from Clock Input to Data Output —UltraMOS® Advanced CMOS Technology •50 to 75 REDUCTION IN POWER FROM BIPOLAR —75mA Typ Icc on Low Power Device —45mA Typ Icc on

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:293.59 Kbytes Page:8 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

封装/外壳:20-LCC(J 形引线) 包装:管件 描述:IC CPLD 8MC 10NS 20PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

封装/外壳:20-LCC(J 形引线) 包装:托盘 描述:IC CPLD 8MC 10NS 20PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

ETC

知名厂家

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

IC CPLD 8MC 10NS 20DIP

Lattice

莱迪思

IC CPLD 8MC 10NS 20DIP

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:395.51 Kbytes Page:22 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

IC CPLD 8MC 10NS 20DIP

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:293.59 Kbytes Page:8 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件:340.72 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:339.82 Kbytes Page:23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件:654.14 Kbytes Page:24 Pages

Lattice

莱迪思

GAL16V8D-10L产品属性

  • 类型

    描述

  • 型号

    GAL16V8D-10L

  • 制造商

    LATTICE

  • 制造商全称

    Lattice Semiconductor

  • 功能描述

    High Performance E2CMOS PLD Generic Array Logic

更新时间:2025-12-23 15:21:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Lattice
2015+
SMD/DIP
19889
一级代理原装现货,特价热卖!
LATTICE
20+
DIP
2860
原厂原装正品价格优惠公司现货欢迎查询
LATTICE
22+
DIP
28583
进口原装!现货库存
Lattice Semiconductor Corporat
23+
20-DIP
11200
主营:汽车电子,停产物料,军工IC
LAT
23+
DIP
8560
受权代理!全新原装现货特价热卖!
Lattice Semiconductor Corporat
23+
20-PDIP
7300
专注配单,只做原装进口现货
最新
2000
原装正品现货
LatticeSemiconductorCorp
24+
20-PDIP
66800
原厂授权一级代理,专注汽车、医疗、工业、新能源!
LATTICE
05+
原厂原装
12937
只做全新原装真实现货供应
LATTICESEMI
23+
PDIP
11888
专做原装正品,假一罚百!

GAL16V8D-10L数据表相关新闻