5V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

5V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC RECEIVER 0/4 16SOIC 集成电路（IC） 驱动器，接收器，收发器

5V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

5V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

5V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

5V LVDS 4-Bit High Speed Differential Receiver

General Description This quad receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low po

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC RECEIVER 0/4 16TSSOP 集成电路（IC） 驱动器，接收器，收发器

UHF Coaxial Male Crimp

Description UHF Male Crimp

CATV Video, RG6, 18 AWG BCCS, Foil Braid, Waterblocked, PVC Jacket

Product Description CATV, Series 6, 18 AWG solid .040 bare copper-covered steel conductor, gas-injected foam polyethylene insulation, Duobond® II, aluminum braid shield (90% coverage), Waterblocked Coreguard®, polyethylene jacket.

Chokes Cylindrical Coil Forms

文件：93.15 Kbytes Page：1 Pages

Chokes Cylindrical Coil Forms

文件：93.15 Kbytes Page：1 Pages

Chokes Cylindrical Coil Forms

文件：93.15 Kbytes Page：1 Pages